Nick: stefanct
E-mail: none
Board: gigabyte EP45-DS4
Contents: 
flashrom -V -c MX25L8005
flashrom v0.9.3-r1282 on Linux 2.6.33.2 (x86_64), built with libpci 3.1.7, GCC 4.5.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2395M loops per second, 10 myus = 13 us, 100 myus = 100 us, 1000 myus = 998 us, 10000 myus = 10017 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Gigabyte Technology Co., Ltd."
DMI string system-product-name: "EP45-DS4"
DMI string system-version: " "
DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd."
DMI string baseboard-product-name: "EP45-DS4"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8720.
Found chipset "Intel ICH10R", enabling flash write... chipset PCI ID is 8086:3a16, 
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode disabled
0xffe00000/0xffa00000 FWH decode disabled
0xffd80000/0xff980000 FWH decode disabled
0xffd00000/0xff900000 FWH decode disabled
0xffc80000/0xff880000 FWH decode disabled
0xffc00000/0xff800000 FWH decode disabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

Root Complex Register Block address = 0xfed1c000
GCS = 0x464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x2008 (HSFS)
FLOCKDN 0, FDV 0, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0
0x50: 0x00000202 (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x02, BRRA 0x02
0x54: 0x00001fff (FREG0: Flash Descriptor)
Flash Descriptor region is unused.
0x58: 0x00001fff (FREG1: BIOS)
BIOS region is unused.
0x5C: 0x00001fff (FREG2: Management Engine)
Management Engine region is unused.
0x60: 0x00001fff (FREG3: Gigabit Ethernet)
Gigabit Ethernet region is unused.
0x64: 0x00001fff (FREG4: Platform Data)
Platform Data region is unused.
0x74: 0x00000000 (PR0)
0x78: 0x00000000 (PR1)
0x7C: 0x00000000 (PR2)
0x80: 0x00000000 (PR3)
0x84: 0x00000000 (PR4)
0x90: 0x04 (SSFS)
AEL 0, FCERR 0, FDONE 1, SCIP 0
0x91: 0x004140 (SSFC)
0x94: 0x5006     (PREOP)
0x96: 0x462b     (OPTYPE)
0x98: 0x05ab0302 (OPMENU)
0x9C: 0xc79f0190 (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xB0: 0x00000000 (FDOC)
Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
SPI Read Configuration: prefetching disabled, caching enabled, OK.
This chipset supports the following protocols: FWH,SPI.
No IT87* serial flash segment enabled.
Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000.
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
No operations were specified.
Restoring PCI config space for 00:1f:0 reg 0xdc