Nick: MrChromebox E-mail: none Board: ATLAS Contents: flashrom MrChromebox-1.4.0-devel_2024.04.18 (git:v1.2-1418-ge5ed0c6340) on Linux 6.8.0-47-generic (x86_64) flashrom was built with GCC 11.4.0, little endian Command line (10 args): /tmp/flashrom -p internal:boardmismatch=force --ifd -i bios -N -w coreboot_edk2-atlas-mrchromebox_20240914.rom -o /tmp/flashrom.log Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer Found candidate at: 00000500-00000528 Found coreboot table at 0x00000500. Found candidate at: 00000000-0000051c Found coreboot table at 0x00000000. coreboot table found at 0x7aa99000. coreboot header(24) checksum: 581b table(1284) checksum: 1108 entries: 43 Vendor ID: Google, part ID: Atlas Using Internal DMI decoder. DMI string chassis-type: "Laptop" Laptop detected via DMI. DMI string system-manufacturer: "Google" DMI string system-product-name: "Atlas" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "Google" DMI string baseboard-product-name: "Atlas" DMI string baseboard-version: "1.0" Found chipset "Intel Kaby Lake Y w/ iHDCP2.2 Prem." with PCI ID 8086:9d4b. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... BIOS_SPI_BC = 0x8b: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI) Top Swap: not enabled SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x8b: BIOS Lock Enable: enabled, BIOS Write Enable: enabled Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed. New value is 0x8b. SPIBAR = 0x00007a9ca078b000 (phys = 0xfe010000) 0x04: 0xf800 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, SCIP=0, PRR34_LOCKDN=1, WRSDIS=1, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done OP Type Pre-OP op[0]: 0x01, write w/o addr, none op[1]: 0x02, write w/ addr, none op[2]: 0x03, read w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x20, write w/ addr, none op[5]: 0x9f, read w/o addr, none op[6]: 0xd8, write w/ addr, none op[7]: 0x0b, read w/ addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x50 0x06: 0x020c (HSFC) HSFC: FGO=0, FCYCLE=6, WET=0, FDBC=2, SME=0 0x08: 0x00000001 (FADDR) 0x0c: 0x00001f00 (DLOCK) DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0, PR0_LOCKDN=1, PR1_LOCKDN=1, PR2_LOCKDN=1, PR3_LOCKDN=1, PR4_LOCKDN=1, SSEQ_LOCKDN=0 0x50: 0x00004acb (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x4a, BRRA 0xcb 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x0fff0200 FREG1: BIOS region (0x00200000-0x00ffffff) is read-write. 0x5C: 0x01ff0001 FREG2: Management Engine region (0x00001000-0x001fffff) is locked. 0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00007fff FREG4: Platform Data region is unused. 0x68: 0x00007fff FREG5: Device Expansion region is unused. 0x6C: 0x00007fff FREG6: BIOS2 region is unused. 0x70: 0x00007fff FREG7: unknown region is unused. 0x74: 0x00007fff FREG8: EC/BMC region is unused. 0x78: 0x00007fff FREG9: unknown region is unused. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x84: 0x00000000 (PR0 is unused) 0x88: 0x00000000 (PR1 is unused) 0x8C: 0x00000000 (PR2 is unused) 0x90: 0x00000000 (PR3 is unused) 0x94: 0x00000000 (PR4 is unused) 0x98: 0x00000000 (GPR0 is unused) At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. 0xa0: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0xa1: 0xfe0000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6 0xa4: 0x5006 (PREOP) 0xa6: 0xb32d (OPTYPE) 0xa8: 0x05030201 (OPMENU) 0xac: 0x0bd89f20 (OPMENU+4) 0xc4: 0xf3d82004 (LVSCC) LVSCC: BES=0x0, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xc8: 0x00002000 (UVSCC) UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x20 Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x00040003 FLMAP1 0x42100208 FLMAP2 0x00310330 --- Details --- NR (Number of Regions): 10 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH/SoC Strap Length): 66 FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x080 MSL/PSL (MCH/PROC Strap Length): 3 FMSBA (Flash MCH/PROC Strap Base Address): 0x300 === Component Section === FLCOMP 0x365c00f5 FLILL 0xad604221 FLILL1 0xc7c4b9b7 --- Details --- Component 1 density: 16 MB Component 2 is not used. Read Clock Frequency: 17 MHz Read ID and Status Clock Freq.: 17 MHz Write and Erase Clock Freq.: 17 MHz Fast Read is supported. Fast Read Clock Frequency: 48 MHz Dual Output Fast Read Support: disabled Invalid instruction 0: 0x21 Invalid instruction 1: 0x42 Invalid instruction 2: 0x60 Invalid instruction 3: 0xad Invalid instruction 4: 0xb7 Invalid instruction 5: 0xb9 Invalid instruction 6: 0xc4 Invalid instruction 7: 0xc7 === Region Section === FLREG0 0x00000000 FLREG1 0x0fff0200 FLREG2 0x01ff0001 FLREG3 0x00007fff FLREG4 0x00007fff FLREG5 0x00007fff FLREG6 0x00007fff FLREG7 0x00007fff FLREG8 0x00007fff FLREG9 0x00007fff --- Details --- Region 0 (Descr. ) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00200000 - 0x00ffffff Region 2 (ME ) 0x00001000 - 0x001fffff Region 3 (GbE ) is unused. Region 4 (Platf. ) is unused. Region 5 (DevExp ) is unused. Region 6 (BIOS2 ) is unused. Region 7 (unknown) is unused. Region 8 (EC/BMC ) is unused. Region 9 (unknown) is unused. === Master Section === FLMSTR1 0x00a10b00 FLMSTR2 0x00400d00 FLMSTR3 0x00800900 --- Details --- FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 BIOS r rw rw r ME r rw r GbE r rw Enabling hardware sequencing by default for 100+ series PCH. OK. No board enable found matching coreboot IDs vendor="Google", model="Atlas". The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Hardware sequencing reports 1 attached SPI flash chip with a density of 16384 kB. There is only one partition containing the whole address space (0x000000 - 0xffffff). There are 4096 erase blocks with 4096 B each. HSFC: FGO=1, FCYCLE=6, WET=0, FDBC=2, SME=0 Chip identified: GD25B128B/GD25Q128B Added layout entry 00000000 - 00ffffff named complete flash Found GigaDevice flash chip "GD25B128B/GD25Q128B" (16384 kB, Programmer-specific) on internal. Found GigaDevice flash chip "GD25B128B/GD25Q128B" (16384 kB, Programmer-specific). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). === This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. You can also try to follow the instructions here: https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html Thanks for your help! Reading ich descriptor... read_flash: Flash Descriptor region (00000000..0x000fff) is readable, reading range (00000000..0x000fff). Reading 4096 bytes starting at 0x000000. HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 done. Assuming chipset '100 series Sunrise Point'. Added layout entry 00000000 - 00000fff named fd Added layout entry 00200000 - 00ffffff named bios Added layout entry 00001000 - 001fffff named me Using region: "bios". coreboot last image size (not ROM size) is 16777216 bytes. Manufacturer: Google Mainboard ID: Atlas This coreboot image matches this mainboard. Reading old flash chip contents... read_flash: BIOS region (0x200000..0xffffff) is readable, reading range (0x200000..0xffffff). Reading 14680064 bytes starting at 0x200000. HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 HSFC: FGO=1, FCYCLE=0, WET=0, FDBC=63, SME=0 FAILED at 0x00c04000! Expected=0xff, Found=0x5f, failed byte count from 0x00c04000-0x00c04fff: 0xea6 ERASE FAILED! Erase/write done from 200000 to ffffff Write Failed!Uh oh. Erase/write failed. Your flash chip is in an unknown state. Get help on IRC (see https://www.flashrom.org/Contact) or mail flashrom@flashrom.org with the subject "FAILED: "!------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Restoring PCI config space for 00:1f:5 reg 0xdc