Nick: ASwift
E-mail: alex@carlingfordgroup.co.uk
Board: RD350
Contents: 
flashrom unknown on Linux 6.8.8-2-pve (x86_64)
flashrom was built with GCC 12.2.0, little endian
Command line (10 args): flashrom -p internal --ifd -i bios -w VB3TS332.BIN -o whatwentwrong.txt -V
Initializing internal programmer
/sys/class/mtd/mtd0 does not exist
No coreboot table found.
Using Internal DMI decoder.
DMI string chassis-type: "Rack Mount Chassis"
DMI string system-manufacturer: "LENOVO"
DMI string system-product-name: "ThinkServer RD350"
DMI string system-version: "70D8                "
DMI string baseboard-manufacturer: "LENOVO"
DMI string baseboard-product-name: "ThinkServer RD350"
DMI string baseboard-version: "70D8                "
Found chipset "Intel C610/X99 (Wellsburg)" with PCI ID 8086:8d44.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with it,
then please email a report to flashrom@flashrom.org including a verbose (-V) log.
Thank you!
Enabling flash write... Root Complex Register Block address = 0xfed1c000
GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (unknown)
Top Swap: not enabled
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x4
0x7fffffff/0x7fffffff FWH IDSEL: 0x5
0x7fffffff/0x7fffffff FWH IDSEL: 0x6
0x7fffffff/0x7fffffff FWH IDSEL: 0x7
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
Maximum FWH chip size: 0x100000 bytes
SPI Read Configuration: prefetching enabled, caching enabled, 
BIOS_CNTL = 0x2a: BIOS Lock Enable: enabled, BIOS Write Enable: disabled
Warning: BIOS region SMM protection is enabled!
Warning: Setting BIOS Control at 0xdc from 0x2a to 0x09 failed.
New value is 0x2a.
SPIBAR = 0x00007c411ad4e000 + 0x3800
0x04: 0xf008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
SPI Configuration is locked down.
Reading OPCODES... done
        OP        Type      Pre-OP
op[0]: 0x02, write w/  addr, none
op[1]: 0x0b, read  w/  addr, none
op[2]: 0x20, write w/  addr, none
op[3]: 0x05, read  w/o addr, none
op[4]: 0x9f, read  w/o addr, none
op[5]: 0x01, write w/o addr, none
op[6]: 0x00, read  w/o addr, none
op[7]: 0x00, read  w/o addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x00
0x06: 0x3f00 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0
0x08: 0x00ffffc0 (FADDR)
0x50: 0x00007a5b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x7a, BRRA 0x5b
0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
0x58: 0x0fff0800 FREG1: BIOS region (0x00800000-0x00ffffff) is read-write.
0x5C: 0x07ff0011 FREG2: Management Engine region (0x00011000-0x007fffff) is locked.
0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused.
0x64: 0x00007fff FREG4: Platform Data region is unused.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
0x74: 0x00000000 (PR0 is unused)
0x78: 0x00000000 (PR1 is unused)
0x7C: 0x00000000 (PR2 is unused)
0x80: 0x00000000 (PR3 is unused)
0x84: 0x00000000 (PR4 is unused)
At least some flash regions are read protected. You have to use a flash
layout and include only accessible regions. For write operations, you'll
additionally need the --noverify-all switch. See manpage for more details.
0x90: 0x80 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0x91: 0xf94010 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1
0x94: 0x0006     (PREOP)
0x96: 0x043b     (OPTYPE)
0x98: 0x05200b02 (OPMENU)
0x9c: 0x0000019f (OPMENU+4)
0xa0: 0x00000000 (BBAR)
0xc4: 0x80800000 (LVSCC)
LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=1
0xc8: 0x00000000 (UVSCC)
UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0
0xd0: 0x50444653 (FPB)
Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0   0x06040003
FLMAP1   0x15100306
FLMAP2   0x1b210120

--- Details ---
NR          (Number of Regions):                     7
FRBA        (Flash Region Base Address):         0x040
NC          (Number of Components):                  1
FCBA        (Flash Component Base Address):      0x030
ISL         (ICH/PCH/SoC Strap Length):             21
FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100
NM          (Number of Masters):                     4
FMBA        (Flash Master Base Address):         0x060
MSL/PSL     (MCH/PROC Strap Length):                 1
FMSBA       (Flash MCH/PROC Strap Base Address): 0x200

=== Component Section ===
FLCOMP   0x001000f5
FLILL    0x00000000

--- Details ---
Component 1 density:            16 MB
Component 2 is not used.
Read Clock Frequency:           20 MHz
Read ID and Status Clock Freq.: 20 MHz
Write and Erase Clock Freq.:    20 MHz
Fast Read is supported.
Fast Read Clock Frequency:      20 MHz
Dual Output Fast Read Support:  disabled
No forbidden opcodes.

=== Region Section ===
FLREG0   0x00000000
FLREG1   0x0fff0800
FLREG2   0x07ff0011
FLREG3   0x00007fff
FLREG4   0x00007fff
FLREG5   0x00000000
FLREG6   0x00000000

--- Details ---
Region 0 (Descr. ) 0x00000000 - 0x00000fff
Region 1 (BIOS   ) 0x00800000 - 0x00ffffff
Region 2 (ME     ) 0x00011000 - 0x007fffff
Region 3 (GbE    ) is unused.
Region 4 (Platf. ) is unused.
Region 5 (DevExp ) 0x00000000 - 0x00000fff
Region 6 (BIOS2  ) 0x00000000 - 0x00000fff

=== Master Section ===
FLMSTR1  0x3a1b0000
FLMSTR2  0x04250000
FLMSTR3  0x08090118
FLMSTR4  0x00000000

--- Details ---
      Descr. BIOS ME GbE Platf.
BIOS    r     rw      rw   rw
ME      r         rw         
GbE     r             rw     

Enabling hardware sequencing because some important opcode is locked.
OK.
The following protocols are supported: FWH, Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Hardware sequencing reports 1 attached SPI flash chip with a density of 16384 kB.
The flash address space (0x000000 - 0xffffff) is divided at address 0x653000 in two partitions.
The first partition ranges from 0x000000 to 0x652fff.
In that range are 1619 erase blocks with 4096 B each.
The second partition ranges from 0x653000 to 0xffffff.
In that range are 2477 erase blocks with 4096 B each.
Added layout entry 00000000 - 00ffffff named complete flash
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) on internal.
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49LH004, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49LH00B4, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel AT82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific).
Reading ich descriptor... Reading 4096 bytes starting at 0x000000.
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
done.
Assuming chipset '8 series Lynx Point'.
Added layout entry 00000000 - 00000fff named fd
Added layout entry 00800000 - 00ffffff named bios
Added layout entry 00011000 - 007fffff named me
Added layout entry 00001000 - 00010fff named reg5
Using region: "bios".
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... Reading 16777216 bytes starting at 0x000000.
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
HSFC: FGO=1, FCYCLE=0, FDBC=63, SME=0
Transaction error between offset 0x00001000 and 0x0000103f (= 0x00001000 + 63)!
HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0
FAILED.
Restoring MMIO space at 0x7c411ad518a0
Restoring PCI config space for 00:1f:0 reg 0xdc