Nick: hell E-mail: NULL Board: Asrock Z97 Extreme6 Contents: ########################################################################## # # # train_receive_enable # # # ########################################################################## Rank 0 Steps 1 and 2: Find middle of high region Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 RcvEn 280 # # # . . . . # . . . # # # . . 288 # # # . . . . # . . . # # # . . 296 # # # # # . . # . . . . # # # . 304 . # # # # . . . . . . . # # # . 312 . # # # # . . . # . . . . # # . 320 . . # # # # . . # . . . . # # # 328 . . # # # # . . # # . . . . # # 336 . . . # # # # . # # . . . . # # 344 . . . # # # # . # # # . . . # # 352 . . . . # # # . # # # . . . # # 360 . . . . # # # . # # # # . . . # 368 # . . . . # # . # # # # . . . # 376 # # . . . # # # . # # # # . . # 384 # # . . . . # # . # # # # . . . 392 # # . . . . # # . . # # # # . . 400 # # . . . . # # . . # # # # . . Update RcvEn timing to be in the center of high region C0.R0: Left Right Width Center B0: 304 360 56 332 B1: 320 368 48 344 B2: 336 400 64 368 B3: 224 288 64 256 B4: 240 288 48 264 B5: 256 312 56 284 B6: 280 328 48 304 B7: 304 368 64 336 C1.R0: Left Right Width Center B0: 248 304 56 276 B1: 264 320 56 292 B2: 280 336 56 308 B3: 296 352 56 324 B4: 312 368 56 340 B5: 328 384 56 356 B6: 232 288 56 260 B7: 256 312 56 284 Step 3: Quarter preamble - Walk backwards Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 IOLAT 0 H H H H H H H H 0 H H H H H H H H 2 H H H H H H H H 2 H H H H H H H H 4 H H H H H H H H 4 H H H H H H H H 6 H H H H H H H H 6 H H H H H H H H 8 H H H H H H H H 8 H H H H H H L L 10 H H H L L L L L 8 L L L L L L L L 10 L L L L L L L L 8 L L L L L L L L C0: Preamble B0: 204 B1: 216 B2: 240 B3: 256 B4: 264 B5: 284 B6: 304 B7: 336 C1: Preamble B0: 148 B1: 164 B2: 180 B3: 196 B4: 212 B5: 228 B6: 260 B7: 284 Step 4: Add 1 qclk Step 5: Walk forward to find rising edge Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 inc 0 # # # # # # # # # # # # # # # # 1 # # # # # # # # # # # # # # # # 2 # # # # # # # # # # # # # # # # 3 # # # # # # # # # # # # # # # # 4 # # # # # # # # # # # # # # # # 5 # # # # # # # # # # # # # # # # 6 # # # # # # # # # # # # # # # # 7 # # # # # # # # # # # # # # # # 8 # # # # # # # # # # # # # # # # 9 # # # # # # # # # # # # # # # # 10 # # # # # # # # # # # # # # # # 11 # # # # # # # # # # # # # # # # 12 # # # # # # # # # # # # # # # # 13 # # # # # # # # # # # # # # # # 14 # # # # # # # # # # # # # # # # 15 # # # # # # # # # # # # # # # # 16 # # # # # # # # # # # # # # # # 17 # # # # # # # # # # # # # # # # 18 # # # # # # # # # # # # # # # # 19 # # # # # # # # # # # # # # # # 20 # # # # # # # # # # # # # # # # 21 # # # # # # # # # # # # # # # # 22 # # # # # # # # # # # # # # # # 23 # # # # # # # # # # # # # # # # 24 # # # # # # # # # # # # # # # # 25 # # # # # # # # # # # # # # # # 26 # # . # # # # # # # # # # # # # 27 # # . # # # # # # # # # # # # # 28 # # . # # # # # # # # # # # # # 29 # # . # # # # # # # # # # # # # 30 # # . . # # # # # # # # # # # # 31 # # . . # # # # # # # # # # . . 32 . # . . . # # # . . # . . . . . 33 . # . . . # # . . . . . . . . . 34 . . . . . # # . . . . . . . . . 35 . . . . . # . . . . . . . . . . 36 . . . . . . . . . . . . . . . . Step 6: center on preamble and clean up rank C0: Preamble increment B0: 236 31 B1: 250 33 B2: 266 25 B3: 286 29 B4: 296 31 B5: 320 35 B6: 339 34 B7: 369 32 C1: Preamble increment B0: 180 31 B1: 196 31 B2: 213 32 B3: 228 31 B4: 244 31 B5: 260 31 B6: 291 30 B7: 315 30 Rank 1 Steps 1 and 2: Find middle of high region Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 RcvEn 280 # # # . . . . # . . . # # # . . 288 # # # # . . . # . . . # # # . . 296 # # # # . . . # . . . # # # # . 304 . # # # # . . # . . . . # # # . 312 . # # # # . . . # . . . # # # # 320 . . # # # . . . # . . . . # # # 328 . . # # # # . . # # . . . # # # 336 . . . # # # . . # # . . . . # # 344 . . . # # # # . # # . . . . # # 352 . . . . # # # . # # # . . . # # 360 . . . . # # # . # # # . . . . # 368 # . . . . # # . # # # # . . . # 376 # . . . . # # # . # # # . . . # 384 # # . . . # # # . # # # # . . . 392 # # . . . . # # . . # # # . . . 400 # # . . . . # # . . # # # . . . Update RcvEn timing to be in the center of high region C0.R1: Left Right Width Center B0: 304 360 56 332 B1: 320 376 56 348 B2: 336 400 64 368 B3: 224 280 56 252 B4: 240 296 56 268 B5: 264 320 56 292 B6: 280 336 56 308 B7: 312 368 56 340 C1.R1: Left Right Width Center B0: 248 304 56 276 B1: 264 320 56 292 B2: 280 344 64 312 B3: 304 360 56 332 B4: 320 376 56 348 B5: 336 400 64 368 B6: 232 288 56 260 B7: 256 304 48 280 Step 3: Quarter preamble - Walk backwards Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 IOLAT 0 H H H H H H H H 0 H H H H H H H H 2 H H H H H H H H 2 H H H H H H H H 4 H H H H H H H H 4 H H H H H H H H 6 H H H H H H H H 6 H H H H H H H H 8 H H H H H H H H 8 H H H H H H L L 10 H H H L L L L L 8 L L L L L L L L 10 L L L L L L L L 8 L L L L L L L L C0: Preamble B0: 204 B1: 220 B2: 240 B3: 252 B4: 268 B5: 292 B6: 308 B7: 340 C1: Preamble B0: 148 B1: 164 B2: 184 B3: 204 B4: 220 B5: 240 B6: 260 B7: 280 Step 4: Add 1 qclk Step 5: Walk forward to find rising edge Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 inc 0 # # # # # # # # # # # # # # # # 1 # # # # # # # # # # # # # # # # 2 # # # # # # # # # # # # # # # # 3 # # # # # # # # # # # # # # # # 4 # # # # # # # # # # # # # # # # 5 # # # # # # # # # # # # # # # # 6 # # # # # # # # # # # # # # # # 7 # # # # # # # # # # # # # # # # 8 # # # # # # # # # # # # # # # # 9 # # # # # # # # # # # # # # # # 10 # # # # # # # # # # # # # # # # 11 # # # # # # # # # # # # # # # # 12 # # # # # # # # # # # # # # # # 13 # # # # # # # # # # # # # # # # 14 # # # # # # # # # # # # # # # # 15 # # # # # # # # # # # # # # # # 16 # # # # # # # # # # # # # # # # 17 # # # # # # # # # # # # # # # # 18 # # # # # # # # # # # # # # # # 19 # # # # # # # # # # # # # # # # 20 # # # # # # # # # # # # # # # # 21 # # # # # # # # # # # # # # # # 22 # # # # # # # # # # # # # # # # 23 # # # # # # # # # # # # # # # # 24 # # # # # # # # # # # # # # # # 25 # # # # # # # # # # # . # . # # 26 # # # # # # # # # # # . # . # # 27 # # # # # # # # # # # . # . # # 28 # # # # # # # # # # # . . . # # 29 # # # # # # # # # # . . . . # # 30 # # . # . . # # # # . . . . # # 31 # # . # . . # # # # . . . . # # 32 . . . # . . . # . . . . . . . # 33 . . . # . . . . . . . . . . . # 34 . . . # . . . . . . . . . . . # 35 . . . # . . . . . . . . . . . # 36 . . . . . . . . . . . . . . . . Step 6: center on preamble and clean up rank C0: Preamble increment B0: 236 31 B1: 252 31 B2: 270 29 B3: 288 35 B4: 298 29 B5: 322 29 B6: 340 31 B7: 373 32 C1: Preamble increment B0: 180 31 B1: 196 31 B2: 213 28 B3: 229 24 B4: 248 27 B5: 265 24 B6: 292 31 B7: 316 35 Step 7: Sync IO latency across all ranks Final Receive Enable and IO latency settings: C0.R0: IOLAT = 10 RT_IOCOMP = 23 B0: 236 B1: 250 B2: 266 B3: 286 B4: 296 B5: 320 B6: 339 B7: 369 C0.R1: IOLAT = 10 RT_IOCOMP = 23 B0: 236 B1: 252 B2: 270 B3: 288 B4: 298 B5: 322 B6: 340 B7: 373 C1.R0: IOLAT = 9 RT_IOCOMP = 23 B0: 244 B1: 260 B2: 277 B3: 292 B4: 308 B5: 324 B6: 355 B7: 379 C1.R1: IOLAT = 9 RT_IOCOMP = 23 B0: 244 B1: 260 B2: 277 B3: 293 B4: 312 B5: 329 B6: 356 B7: 380 ########################################################################## # # # train_read_mpr # # # ########################################################################## Rank 0 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 DqsDelay -32 # # # # # # # # # # # # # # # # -31 # # # # # # # # # # # # # # # # -30 # # # # # # # # # # # # # # # # -29 # # # # # # # # # # # # # # # # -28 # # # # # # # # # # # # # # # # -27 # # # # # # # # # # # # # # # # -26 # # # # # # # # # # # # # # # # -25 # # # # # # # # # # # # # # # # -24 # # # # # # # # # # # # # # # # -23 # # # # # # # # # # # # # # # # -22 # # # # # # # # # # # # # # # # -21 # # # # # # # # # # # # # # # # -20 # # # # # # # # # # # # # # # # -19 # # # # # # # # # # # # # # # # -18 # # # # # # # # # # # # # # # # -17 # # # # # # # # # # # # # # # # -16 # # # # # # # # # # # # # # # # -15 # # # # # # # # # # # # # # # # -14 # # # # # # # # # # # # # # # # -13 # # # # # # # # # # # # # # # # -12 # # # # # # # # # # # . # # # # -11 # # # # # # # # # # # . # # # # -10 # # # # # # # # . # # . # # # # -9 # # # # # # # # . # . . # # . . -8 # # # . # # # # . . . . . # . . -7 # # # . # # # # . . . . . . . . -6 # # # . . # # # . . . . . . . . -5 # # # . . . # # . . . . . . . . -4 # # . . . . # # . . . . . . . . -3 # # . . . . # . . . . . . . . . -2 # # . . . . . . . . . . . . . . -1 . . . . . . . . . . . . . . . . 0 . . . . . . . . . . . . . . . . 1 . . . . . . . . . . . . . . . . 2 . . . . . . . . . . . . . . . . 3 . . . . . . . . . . . . . . . . 4 . . . . . . . . . . . . . . . . 5 . . . . . . . . . . . . . . . . 6 . . . . . . . . . . . . . . . . 7 . . . . . . . . . . . . . . . . 8 . . . . . . . . . . . . . . . . 9 . . . . . . . . . . . . . . . . 10 . . . . . . . . . . . . . . . . 11 . . . . . . . . . . . . . . . . 12 . . . . . . . . . . . . . . . . 13 . . . . . . . . . . . . . . . . 14 . . . . . . . . . . . . . . . . 15 . . . . . . . . . . . . . . . . 16 . . . . . . . . . . . . . . . . 17 . . . . . . . . . . . . . . . . 18 . . . . . . . . . . . . . . . . 19 . . . . . . . . . . . . . . . . 20 . . . . . . . . . . . . . . . . 21 . . . . . . . . . . . . . . . . 22 . . . . . . . . . . . . . . . . 23 . . . . . . . . . . . . . . . . 24 . . . . . . . . . . . . . . . . 25 . . . . . . . . . . . . . . . . 26 . . . . . . . . . . . . . . . . 27 . . . . . . . . . . . . . . . . 28 . . . . . . . . . . . . . . . . 29 . . . . . . . . . . . . . . . . 30 . . . . . . . . . . . . . . . . 31 . . . . . . . . . . . . . . . . C0.R0: Left Right Width Center RxDqsPN B0: -1 31 32 15 47 B1: -1 31 32 15 47 B2: -4 31 35 13 45 B3: -8 31 39 11 43 B4: -6 31 37 12 44 B5: -5 31 36 13 45 B6: -2 31 33 14 46 B7: -3 31 34 14 46 C1.R0: Left Right Width Center RxDqsPN B0: -10 31 41 10 42 B1: -8 31 39 11 43 B2: -9 31 40 11 43 B3: -12 31 43 9 41 B4: -8 31 39 11 43 B5: -7 31 38 12 44 B6: -9 31 40 11 43 B7: -9 31 40 11 43 Rank 1 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 DqsDelay -32 # # # # # # # # # # # # # # # # -31 # # # # # # # # # # # # # # # # -30 # # # # # # # # # # # # # # # # -29 # # # # # # # # # # # # # # # # -28 # # # # # # # # # # # # # # # # -27 # # # # # # # # # # # # # # # # -26 # # # # # # # # # # # # # # # # -25 # # # # # # # # # # # # # # # # -24 # # # # # # # # # # # # # # # # -23 # # # # # # # # # # # # # # # # -22 # # # # # # # # # # # # # # # # -21 # # # # # # # # # # # # # # # # -20 # # # # # # # # # # # # # # # # -19 # # # # # # # # # # # # # # # # -18 # # # # # # # # # # # # # # # # -17 # # # # # # # # # # # # # # # # -16 # # # # # # # # # # # # # # # # -15 # # # # # # # # # # # # # # # # -14 # # # # # # # # # # # # # # # # -13 # # # # # # # # # # # # # # # # -12 # # # # # # # # # # # . # # # # -11 # # # # # # # # . # # . # # . # -10 # # # # # # # # . # . . # # . # -9 # # # # # # # # . # . . # # . . -8 # # # # # # # # . . . . # # . . -7 # # # # # # # # . . . . # # . . -6 # # # . . # # # . . . . . # . . -5 # # # . . . # # . . . . . # . . -4 # # # . . . # # . . . . . . . . -3 . . . . . . # . . . . . . . . . -2 . . . . . . . . . . . . . . . . -1 . . . . . . . . . . . . . . . . 0 . . . . . . . . . . . . . . . . 1 . . . . . . . . . . . . . . . . 2 . . . . . . . . . . . . . . . . 3 . . . . . . . . . . . . . . . . 4 . . . . . . . . . . . . . . . . 5 . . . . . . . . . . . . . . . . 6 . . . . . . . . . . . . . . . . 7 . . . . . . . . . . . . . . . . 8 . . . . . . . . . . . . . . . . 9 . . . . . . . . . . . . . . . . 10 . . . . . . . . . . . . . . . . 11 . . . . . . . . . . . . . . . . 12 . . . . . . . . . . . . . . . . 13 . . . . . . . . . . . . . . . . 14 . . . . . . . . . . . . . . . . 15 . . . . . . . . . . . . . . . . 16 . . . . . . . . . . . . . . . . 17 . . . . . . . . . . . . . . . . 18 . . . . . . . . . . . . . . . . 19 . . . . . . . . . . . . . . . . 20 . . . . . . . . . . . . . . . . 21 . . . . . . . . . . . . . . . . 22 . . . . . . . . . . . . . . . . 23 . . . . . . . . . . . . . . . . 24 . . . . . . . . . . . . . . . . 25 . . . . . . . . . . . . . . . . 26 . . . . . . . . . . . . . . . . 27 . . . . . . . . . . . . . . . . 28 . . . . . . . . . . . . . . . . 29 . . . . . . . . . . . . . . . . 30 . . . . . . . . . . . . . . . . 31 . . . . . . . . . . . . . . . . C0.R1: Left Right Width Center RxDqsPN B0: -3 31 34 14 46 B1: -3 31 34 14 46 B2: -3 31 34 14 46 B3: -6 31 37 12 44 B4: -6 31 37 12 44 B5: -5 31 36 13 45 B6: -2 31 33 14 46 B7: -3 31 34 14 46 C1.R1: Left Right Width Center RxDqsPN B0: -11 31 42 10 42 B1: -8 31 39 11 43 B2: -10 31 41 10 42 B3: -12 31 43 9 41 B4: -6 31 37 12 44 B5: -4 31 35 13 45 B6: -11 31 42 10 42 B7: -9 31 40 11 43 ########################################################################## # # # train_jedec_write_leveling # # # ########################################################################## Rank 0 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 WlDelay 192: #1 #1 #1 .31 .32 .32 #0 #0 #0 #1 #1 #0 .32 .32 #0 #0 194: #0 #0 #0 .32 .32 .32 #0 #0 #1 #0 #0 #0 .32 .32 #0 #0 196: #0 #0 #0 .32 .32 .32 #0 #0 .31 #0 #0 #0 .32 .32 #0 #0 198: #0 #0 #0 #1 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 #0 #0 200: #0 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 #0 #0 202: .31 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 #10 #0 204: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 206: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 208: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 210: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 212: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 214: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 216: .32 #0 #0 #0 .32 .32 .31 #0 .32 .31 #0 #0 #5 .32 .32 .31 218: .32 #0 #0 #0 .32 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 .32 220: .32 #0 #0 #0 .32 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 .32 222: .32 #0 #0 #0 .32 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 .32 224: .32 .31 #0 #0 .32 .32 .32 .31 .32 .32 #0 #0 #0 .32 .32 .32 226: .32 .32 #0 #0 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 228: .32 .32 #0 #0 #1 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 230: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 232: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 234: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 236: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 238: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .31 #0 #0 #1 .32 .32 240: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 242: .32 .32 #0 #0 #0 .16 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 244: .32 .32 #0 #0 #0 #1 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 246: .32 .32 #0 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 248: .32 .32 .31 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 250: .32 .32 .32 #0 #0 #0 .32 .32 #5 .32 .32 #0 #0 #0 .32 .32 252: .32 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 254: .32 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 256: .32 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 258: #1 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 #1 .32 260: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 #0 .32 262: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .31 #0 #0 #0 .32 264: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 266: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 268: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 270: #0 .32 .32 .31 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 272: #0 .32 .32 .32 #0 #0 .22 .32 #0 #1 .32 .32 #0 #0 #0 #1 274: #0 .32 .32 .32 #0 #0 #1 .32 #0 #0 .32 .32 #0 #0 #0 #0 276: #0 .32 .32 .32 #0 #0 #0 .32 #0 #0 .32 .32 #0 #0 #0 #0 278: #0 .32 .32 .32 #0 #0 #0 .32 #0 #0 .32 .32 #0 #0 #0 #0 280: #0 .32 .32 .32 #0 #0 #0 #2 #0 #0 .32 .32 #0 #0 #0 #0 282: #0 #1 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 284: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 286: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 288: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #6 #0 #0 #0 290: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .31 #0 #0 #0 292: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 #0 294: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 #1 .32 .32 #0 #0 #0 296: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 298: #0 #0 .32 .32 #14 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 300: #0 #0 .32 .32 .31 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 302: #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 304: #0 #0 #1 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 306: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 308: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 310: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .31 #0 #0 312: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 314: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 316: #0 #0 #0 .32 .32 .31 #0 #0 #0 #0 #0 #1 .32 .32 #0 #0 318: #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 InitSt InitEn CurrSt CurrEn LargSt LargEn C0 B0: 190 190 202 256 202 256 B1: 190 190 224 280 224 280 B2: 190 190 248 302 248 302 B3: 192 196 270 324 270 324 B4: 192 226 300 354 300 354 B5: 192 242 316 370 316 370 B6: 190 190 216 272 216 272 B7: 190 190 224 278 224 278 C1 B0: 190 190 196 248 196 248 B1: 190 190 216 270 216 270 B2: 190 190 238 292 238 292 B3: 190 190 262 314 262 314 B4: 192 214 290 342 290 342 B5: 192 236 310 364 310 364 B6: 190 190 204 256 204 256 B7: 190 190 216 270 216 270 C0.R0: LftEdge Width B0: 202 54 B1: 224 56 B2: 248 54 B3: 270 54 B4: 300 54 B5: 316 54 B6: 216 56 B7: 224 54 C1.R0: LftEdge Width B0: 196 52 B1: 216 54 B2: 238 54 B3: 262 52 B4: 290 52 B5: 310 54 B6: 204 52 B7: 216 54 Rank 1 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 WlDelay 192: #0 #0 #0 .31 .31 .31 #0 #0 #0 #0 #0 .31 .31 .31 #0 #0 194: #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #1 .32 .32 #0 #0 196: #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 198: #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 200: #0 #0 #0 .32 .32 .32 #0 #0 .31 #0 #0 #0 .32 .32 #0 #0 202: #0 #0 #0 #1 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .31 #0 204: #0 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 206: .31 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 208: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 210: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 212: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 214: .32 #0 #0 #0 .32 .32 #0 #0 .32 #0 #0 #0 .32 .32 .32 #0 216: .32 #0 #0 #0 .32 .32 #0 #0 .32 .31 #0 #0 .32 .32 .32 .30 218: .32 #0 #0 #0 .32 .32 #0 #0 .32 .32 #0 #0 .32 .32 .32 .32 220: .32 #0 #0 #0 .32 .32 .31 #0 .32 .32 #0 #0 .32 .32 .32 .32 222: .32 #0 #0 #0 .32 .32 .32 #0 .32 .32 #0 #0 #1 .32 .32 .32 224: .32 #0 #0 #0 .32 .32 .32 #2 .32 .32 #0 #0 #0 .32 .32 .32 226: .32 #0 #0 #0 .32 .32 .32 .31 .32 .32 #0 #0 #0 .32 .32 .32 228: .32 #0 #0 #0 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 230: .32 .31 #0 #0 #1 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 232: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 234: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 236: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 238: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 240: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 242: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .21 #0 #0 .32 .32 .32 244: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32 #0 #0 #1 .32 .32 246: .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 248: .32 .32 .31 #0 #0 #1 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 250: .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 252: .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 254: .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 256: .32 .32 .32 #0 #0 #0 .32 .32 #1 .32 .32 #0 #0 #0 .32 .32 258: .32 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 .32 .32 260: #1 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 #1 .32 262: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #0 #0 #0 #0 .32 264: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 #2 #0 #0 #0 .32 266: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 268: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 270: #0 .32 .32 #0 #0 #0 .32 .32 #0 .32 .32 .32 #0 #0 #0 .32 272: #0 .32 .32 .31 #0 #0 .32 .32 #0 #1 .32 .32 #0 #0 #0 .32 274: #0 .32 .32 .32 #0 #0 .31 .32 #0 #0 .32 .32 #0 #0 #0 #1 276: #0 .32 .32 .32 #0 #0 #1 .32 #0 #0 .32 .32 #0 #0 #0 #0 278: #0 .32 .32 .32 #0 #0 #0 .32 #0 #0 .32 .32 #0 #0 #0 #0 280: #0 .32 .32 .32 #0 #0 #0 .32 #0 #0 .32 .32 #0 #0 #0 #0 282: #0 .32 .32 .32 #0 #0 #0 #1 #0 #0 .32 .32 #0 #0 #0 #0 284: #0 .32 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 286: #0 #1 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 288: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 290: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 #0 292: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .31 #0 #0 #0 294: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 #0 296: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 #0 298: #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 #0 300: #0 #0 .32 .32 .20 #0 #0 #0 #0 #0 #1 .32 .32 #0 #0 #0 302: #0 #0 .32 .32 .31 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 304: #0 #0 #2 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 306: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 308: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 310: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 312: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 #0 #0 #0 314: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .31 #0 #0 316: #0 #0 #0 .32 .32 #0 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 318: #0 #0 #0 .32 .32 .25 #0 #0 #0 #0 #0 .32 .32 .32 #0 #0 InitSt InitEn CurrSt CurrEn LargSt LargEn C0 B0: 190 190 206 258 206 258 B1: 190 190 230 284 230 284 B2: 190 190 248 302 248 302 B3: 192 200 272 328 272 328 B4: 192 228 300 356 300 356 B5: 192 246 318 374 318 374 B6: 190 190 220 274 220 274 B7: 190 190 226 280 226 280 C1 B0: 190 190 200 254 200 254 B1: 190 190 216 270 216 270 B2: 190 190 242 298 242 298 B3: 192 192 266 320 266 320 B4: 192 220 292 348 292 348 B5: 192 242 314 370 314 370 B6: 190 190 202 258 202 258 B7: 190 190 216 272 216 272 C0.R1: LftEdge Width B0: 206 52 B1: 230 54 B2: 248 54 B3: 272 56 B4: 300 56 B5: 318 56 B6: 220 54 B7: 226 54 C1.R1: LftEdge Width B0: 200 54 B1: 216 54 B2: 242 56 B3: 266 54 B4: 292 56 B5: 314 56 B6: 202 56 B7: 216 56 ########################################################################## # # # train_jedec_write_leveling_cleanup # # # ########################################################################## Rank 0 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Delay DqOffset 0 0 # # # # # # # # # # # # # # # # 0 -10 # # # # # # # # # # # # # # # # 0 10 # # # # # # # # # # # # # # # # 0 -5 # # # # # # # # # # # # # # # # 0 5 # # # # # # # # # # # # # # # # 0 -15 # # # # # # # # # # # # # # # # 0 15 # # # # # # # # # # # # # # # # 1 0 . . . . . . # # . . . . . . # # 1 -10 . . . . . . # # . . . . . . # # 1 10 . . . . . . # # . . . . . . # # 1 -5 . . . . . . # # . . . . . . # # 1 5 . . . . . . # # . . . . . . # # 1 -15 . . . . . . # # . . . . . . # # 1 15 . . . . . . # # . . . . . . # # -1 0 # # # # # # # # # # # # # # # # -1 -10 # # # # # # # # # # # # # # # # -1 10 # # # # # # # # # # # # # # # # -1 -5 # # # # # # # # # # # # # # # # -1 5 # # # # # # # # # # # # # # # # -1 -15 # # # # # # # # # # # # # # # # -1 15 # # # # # # # # # # # # # # # # 2 0 # # # # # # . . # # # # # # . . C0.R0: Offset FinalEdge B0: 0 202 B1: 0 224 B2: 0 248 B3: 0 270 B4: 0 300 B5: 0 316 B6: 128 344 B7: 128 352 C1.R0: Offset FinalEdge B0: 0 196 B1: 0 216 B2: 0 238 B3: 0 262 B4: 0 290 B5: 0 310 B6: 128 332 B7: 128 344 Rank 1 Channel 0 1 Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Delay DqOffset 0 0 # # # # # # # # # # # # # # # # 0 -10 # # # # # # # # # # # # # # # # 0 10 # # # # # # # # # # # # # # # # 0 -5 # # # # # # # # # # # # # # # # 0 5 # # # # # # # # # # # # # # # # 0 -15 # # # # # # # # # # # # # # # # 0 15 # # # # # # # # # # # # # # # # 1 0 . . . . . . # # . . . . . . # # 1 -10 . . . . . . # # . . . . . . # # 1 10 . . . . . . # # . . . . . . # # 1 -5 . . . . . . # # . . . . . . # # 1 5 . . . . . . # # . . . . . . # # 1 -15 . . . . . . # # . . . . . . # # 1 15 . . . # . . # # . . . . . . # # -1 0 # # # # # # # # # # # # # # # # -1 -10 # # # # # # # # # # # # # # # # -1 10 # # # # # # # # # # # # # # # # -1 -5 # # # # # # # # # # # # # # # # -1 5 # # # # # # # # # # # # # # # # -1 -15 # # # # # # # # # # # # # # # # -1 15 # # # # # # # # # # # # # # # # 2 0 # # # # # # . . # # # # # # . . C0.R1: Offset FinalEdge B0: 0 206 B1: 0 230 B2: 0 248 B3: 0 272 B4: 0 300 B5: 0 318 B6: 128 348 B7: 128 354 C1.R1: Offset FinalEdge B0: 0 200 B1: 0 216 B2: 0 242 B3: 0 266 B4: 0 292 B5: 0 314 B6: 128 330 B7: 128 344