Nick: Compy E-mail: hello@86pixels.com Board: Apollo Lake Contents: flashrom v1.2 on Linux 5.5.4-arch1-1 (x86_64) flashrom was built with libpci 3.6.2, GCC 9.2.1 20200130, little endian Command line (9 args): flashrom -p internal -w bios.bin --ifd -i bios -o logfile-write.txt Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer get_mtd_info: device_name: "intel-spi", is_writeable: 0, numeraseregions: 0, total_size: 8388608, erasesize: 4096 Cannot open file stream for /dev/mtd0 No coreboot table found. Using Internal DMI decoder. No DMI table found. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 89. Found chipset "Intel Apollo Lake" with PCI ID 8086:5ae8. Enabling flash write... BIOS_SPI_BC = 0x208: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x0 (SPI) Top Swap: not enabled SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled SPIBAR = 0x00007fd46b320000 (phys = 0xfed01000) 0x04: 0xe800 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done OP Type Pre-OP op[0]: 0x00, read w/o addr, none op[1]: 0x00, read w/o addr, none op[2]: 0x00, read w/o addr, none op[3]: 0x00, read w/o addr, none op[4]: 0x00, read w/o addr, none op[5]: 0x00, read w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x00, Pre-OP 1: 0x00 0x06: 0x3f00 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 0x08: 0x006fefc0 (FADDR) 0x0c: 0x00000000 (DLOCK) DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0, PR0_LOCKDN=0, PR1_LOCKDN=0, PR2_LOCKDN=0, PR3_LOCKDN=0, PR4_LOCKDN=0, SSEQ_LOCKDN=0 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x06fe0001 FREG1: BIOS region (0x00001000-0x006fefff) is read-write. 0x5C: 0x00007fff FREG2: Management Engine region is unused. 0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00007fff FREG4: Platform Data region is unused. 0x68: 0x07fe06ff FREG5: Device Expansion region (0x006ff000-0x007fefff) is read-write. 0x6C: 0x00007fff FREG6: BIOS2 region is unused. 0x70: 0x00007fff FREG7: unknown region is unused. 0x74: 0x00007fff FREG8: EC/BMC region is unused. 0x78: 0x00007fff FREG9: unknown region is unused. 0x7C: 0x00007fff FREG10: unknown region is unused. 0x80: 0x00007fff FREG11: unknown region is unused. 0xE0: 0x00007fff FREG12: unknown region is unused. 0xE4: 0x00007fff FREG13: unknown region is unused. 0xE8: 0x00007fff FREG14: unknown region is unused. 0xEC: 0x00007fff FREG15: unknown region is unused. 0x84: 0x00000000 (PR0 is unused) 0x88: 0x00000000 (PR1 is unused) 0x8C: 0x00000000 (PR2 is unused) 0x90: 0x00000000 (PR3 is unused) 0x94: 0x00000000 (PR4 is unused) 0x98: 0x00000000 (GPR0 is unused) 0xa0: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0xa1: 0xfe0000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6 0xa4: 0x0000 (PREOP) 0xa6: 0x0000 (OPTYPE) 0xa8: 0x00000000 (OPMENU) 0xac: 0x00000000 (OPMENU+4) 0xc4: 0xb3d82085 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xc8: 0x00002025 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x00040003 FLMAP1 0x13100208 FLMAP2 0x00000000 --- Details --- NR (Number of Regions): 6 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH/SoC Strap Length): 19 FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100 NM (Number of Masters): 2 FMBA (Flash Master Base Address): 0x080 MSL/PSL (MCH/PROC Strap Length): 0 FMSBA (Flash MCH/PROC Strap Base Address): 0x000 === Component Section === FLCOMP 0x249c02f4 FLILL 0xad604221 FLILL1 0xc7c4b9b7 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 14 MHz / 17 MHz Read ID and Status Clock Freq.: 25 MHz Write and Erase Clock Freq.: 25 MHz Fast Read is supported. Fast Read Clock Frequency: 25 MHz Dual Output Fast Read Support: enabled Invalid instruction 0: 0x21 Invalid instruction 1: 0x42 Invalid instruction 2: 0x60 Invalid instruction 3: 0xad Invalid instruction 4: 0xb7 Invalid instruction 5: 0xb9 Invalid instruction 6: 0xc4 Invalid instruction 7: 0xc7 === Region Section === FLREG0 0x00000000 FLREG1 0x06fe0001 FLREG2 0x00007fff FLREG3 0x00007fff FLREG4 0x00007fff FLREG5 0x07fe06ff --- Details --- Region 0 (Descr. ) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00001000 - 0x006fefff Region 2 (ME ) is unused. Region 3 (GbE ) is unused. Region 4 (Platf. ) is unused. Region 5 (DevExp ) 0x006ff000 - 0x007fefff === Master Section === FLMSTR1 0xffffff00 FLMSTR2 0xffffff00 --- Details --- FD IFWI TXE n/a Platf DevExp BIOS rw rw rw rw rw rw TXE rw rw rw rw rw rw Enabling hardware sequencing because some important opcode is locked. OK. The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Hardware sequencing reports 1 attached SPI flash chip with a density of 8192 kB. There is only one partition containing the whole address space (0x000000 - 0x7fffff). There are 2048 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific). Reading ich descriptor... Reading 4096 bytes starting at 0x000000. done. Assuming chipset 'Apollo Lake'. Using region: "bios". Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... Reading 8388608 bytes starting at 0x000000. Transaction error between offset 0x007ff000 and 0x007ff03f (= 0x007ff000 + 63)! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 FAILED. Restoring PCI config space for 00:0d:2 reg 0xdc