Nick: hell__
E-mail: something with @
Board: Gemini Lake
Contents: 
$ ./ich_descriptors_tool -f SPI.bin 
The flash image has a size of 8388608 [0x800000] bytes.
Peculiar firmware descriptor, assuming Apollo Lake compatibility.

The firmware descriptor looks like a Skylake/Sunrise Point descriptor.
However, the read frequency isn't set to 17MHz (the only valid value).
Please report this message, the output of `ich_descriptors_tool` for
your descriptor and the output of `lspci -nn` to flashrom@flashrom.org

Assuming chipset '9 series Wildcat Point'.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0   0x00040003
FLMAP1   0x17100208
FLMAP2   0x00000000

--- Details ---
NR          (Number of Regions):                     1
FRBA        (Flash Region Base Address):         0x040
NC          (Number of Components):                  1
FCBA        (Flash Component Base Address):      0x030
ISL         (ICH/PCH/SoC Strap Length):             23
FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100
NM          (Number of Masters):                     3
FMBA        (Flash Master Base Address):         0x080
MSL/PSL     (MCH/PROC Strap Length):                 0
FMSBA       (Flash MCH/PROC Strap Base Address): 0x000

=== Component Section ===
FLCOMP   0x125882f4
FLILL    0xad604221

--- Details ---
Component 1 density:            8 MB
Component 2 is not used.
Read Clock Frequency:           50 MHz
Read ID and Status Clock Freq.: reserved
Write and Erase Clock Freq.:    reserved
Fast Read is supported.
Fast Read Clock Frequency:      reserved
Dual Output Fast Read Support:  enabled
Invalid instruction 0:          0x21
Invalid instruction 1:          0x42
Invalid instruction 2:          0x60
Invalid instruction 3:          0xad

=== Region Section ===
FLREG0   0x00000000

--- Details ---
Region 0 (Descr. ) 0x00000000 - 0x00000fff

=== Master Section ===
FLMSTR1  0xffffff00
FLMSTR2  0xffffff00
FLMSTR3  0x7ff7ff00

--- Details ---
      Descr. BIOS ME GbE Platf.
BIOS    rw    rw  rw  rw   rw
ME      rw    rw  rw  rw   rw
GbE     rw    rw  rw   w   rw

=== Upper Map Section ===
FLUMAP1  0x000008df

--- Details ---
VTL (length in DWORDS) = 8
VTBA (base address)    = 0x000df0

VSCC Table: 4 entries
  JID0  = 0x0000471f
  VSCC0 = 0x20152015
    Manufacturer ID 0x1f, Device ID 0x4700
    BES=0x1, WG=1, WSR=0, WEWS=1, EO=0x20
  JID1  = 0x001760ef
  VSCC1 = 0x20252025
    Manufacturer ID 0xef, Device ID 0x6017
    BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20
  JID2  = 0x001760c8
  VSCC2 = 0x20252025
    Manufacturer ID 0xc8, Device ID 0x6017
    BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20
  JID3  = 0x001860ef
  VSCC3 = 0x20252025
    Manufacturer ID 0xef, Device ID 0x6018
    BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20

=== Softstraps ===
--- North/MCH/PROC (0 entries) ---

ISL (23) is greater than the current maximum of 18 entries.
Only the first 18 entries will be printed.
--- South/ICH/PCH (18 entries) ---
STRP0  = 0x000000a1
STRP1  = 0x00ff0000
STRP2  = 0xd8000080
STRP3  = 0x00000665
STRP4  = 0x00000000
STRP5  = 0x00600304
STRP6  = 0x00500000
STRP7  = 0x00000012
STRP8  = 0x00005007
STRP9  = 0x00000000
STRP10 = 0x0000002c
STRP11 = 0x00000000
STRP12 = 0x00050504
STRP13 = 0x00004000
STRP14 = 0x00000000
STRP15 = 0x00004000
STRP16 = 0x00000000
STRP17 = 0x00000000

The meaning of the descriptor straps are unknown yet.

The MAC address might be at offset 0x0: 01:78:00:34:80:7a