Nick: szy_mat E-mail: szy.mat2@gmail.com Board: H81 Pro BTC R2.0 Contents: flashrom v1.1-rc1-68-gea0c093 on Linux 4.9.0-6-amd64 (x86_64) flashrom was built with libpci 3.5.2, GCC 8.3.0, little endian Command line (9 args): ./flashrom -p internal -c W25Q32.V -r dupa.img -V -o logfile Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer /sys/class/mtd/mtd0 does not exist Found candidate at: 00000500-00000510 Found coreboot table at 0x00000500. Found candidate at: 00000000-00000664 Found coreboot table at 0x00000000. coreboot table found at 0x7f76b000. coreboot header(24) checksum: 51f3 table(1636) checksum: 15dc entries: 31 Vendor ID: ASROCK, part ID: H81M-HDS Using Internal DMI decoder. DMI string chassis-type: "Desktop" DMI string system-manufacturer: "ASROCK" DMI string system-product-name: "H81M-HDS" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "ASROCK" DMI string baseboard-product-name: "H81M-HDS" DMI string baseboard-version: "1.0" Found chipset "Intel H81" with PCI ID 8086:8c5c. Enabling flash write... Root Complex Register Block address = 0xfed1c000 GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap: not enabled 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled Maximum FWH chip size: 0x100000 bytes SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled SPIBAR = 0x00007fcd8b910000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done OP Type Pre-OP op[0]: 0x01, write w/o addr, none op[1]: 0x02, write w/ addr, none op[2]: 0x03, read w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x20, write w/ addr, none op[5]: 0x9f, read w/o addr, none op[6]: 0xd8, write w/ addr, none op[7]: 0x0b, read w/ addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x50 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00001000 (FADDR) 0x50: 0x00004a4b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x4a, BRRA 0x4b 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x03ff0180 FREG1: BIOS region (0x00180000-0x003fffff) is read-write. 0x5C: 0x017f0001 FREG2: Management Engine region (0x00001000-0x0017ffff) is locked. 0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00007fff FREG4: Platform Data region is unused. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. 0x90: 0xc4 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xfc0000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=4 0x94: 0x5006 (PREOP) 0x96: 0xb32d (OPTYPE) 0x98: 0x05030201 (OPMENU) 0x9c: 0x0bd89f20 (OPMENU+4) 0xa0: 0x00000000 (BBAR) 0xc4: 0x80000000 (LVSCC) LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=0 0xc8: 0x00000000 (UVSCC) UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0 0xd0: 0x50444653 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x15100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH/SoC Strap Length): 21 FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x64900043 FLILL 0x00000000 --- Details --- Component 1 density: 4 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 50 MHz Write and Erase Clock Freq.: 50 MHz Fast Read is supported. Fast Read Clock Frequency: 50 MHz Dual Output Fast Read Support: disabled No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x03ff0180 FLREG2 0x017f0001 --- Details --- Region 0 (Descr. ) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00180000 - 0x003fffff Region 2 (ME ) 0x00001000 - 0x0017ffff === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw OK. No board enable found matching coreboot IDs vendor="ASROCK", model="H81M-HDS". The following protocols are supported: FWH, SPI. Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Found Winbond flash chip "W25Q32.V" (4096 kB, SPI) mapped at physical address 0x00000000ffc00000. Chip status register is 0x00. This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Block protection is disabled. Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=2, DBC=63, SME=0, SCF=4 Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0x7fcd8b9138a0