Nick: dhendrix E-mail: none Board: watson ssdt with 26746 Contents: /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20160108-64 * Copyright (c) 2000 - 2016 Intel Corporation * * Disassembling to symbolic ASL+ operators * * Disassembly of watson_ssdt.orig, Sun Jun 3 14:44:50 2018 * * Original Table Header: * Signature "SSDT" * Length 0x00001CC3 (7363) * Revision 0x02 * Checksum 0x43 * OEM ID "CORE " * OEM Table ID "COREBOOT" * OEM Revision 0x0000002A (42) * Compiler ID "CORE" * Compiler Version 0x0000002A (42) */ DefinitionBlock ("watson_ssdt.aml", "SSDT", 2, "CORE ", "COREBOOT", 0x0000002A) { External (_SB_.PCI0, DeviceObj) External (_SB_.PCI0.LPC0.LNKA, UnknownObj) External (_SB_.PCI0.LPC0.LNKB, UnknownObj) External (_SB_.PCI0.LPC0.LNKC, UnknownObj) External (_SB_.PCI0.LPC0.LNKD, UnknownObj) External (_SB_.PCI0.LPC0.LNKG, UnknownObj) External (PICM, IntObj) Device (CTBL) { Name (_HID, "BOOT0000") // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0x7EFF6000, // Address Base 0x00008000, // Address Length ) }) } Processor (\_PR.CP00, 0x00, 0x00000400, 0x06) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000000, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP01, 0x01, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000001, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP02, 0x02, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000002, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP03, 0x03, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000003, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP04, 0x04, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000004, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP05, 0x05, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000005, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP06, 0x06, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000006, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Processor (\_PR.CP07, 0x07, 0x00000000, 0x00) { Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000007, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000A8C, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000898, 0x000088B8, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x000080DD, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x0000796B, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x000071FA, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00006AB1, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00006387, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x00005CA2, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000055C0, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004F36, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004899, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x0000423D, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x00003C05, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x000035E0, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002FEB, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x00002A09, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (_CST, Package (0x04) // _CST: C-States { 0x00000003, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x00000001, 0x00000001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x01, // Access Size ) }, 0x00000002, 0x0000000F, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x01, // Access Size ) }, 0x00000003, 0x00000029, 0x0000015E } }) } Scope (\_SB.PCI0) { Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x0A) { Package (0x04) { 0x0000FFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x0001FFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x0002FFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x0003FFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x0014FFFF, 0x03, Zero, 0x00000013 }, Package (0x04) { 0x0016FFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x0016FFFF, 0x01, Zero, 0x00000011 }, Package (0x04) { 0x001BFFFF, 0x00, Zero, 0x00000016 }, Package (0x04) { 0x001FFFFF, 0x00, Zero, 0x00000010 }, Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x00000012 } }) } Else { Return (Package (0x0A) { Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x0014FFFF, 0x03, \_SB.PCI0.LPC0.LNKD, 0x00000000 }, Package (0x04) { 0x0016FFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x0016FFFF, 0x01, \_SB.PCI0.LPC0.LNKB, 0x00000000 }, Package (0x04) { 0x001BFFFF, 0x00, \_SB.PCI0.LPC0.LNKG, 0x00000000 }, Package (0x04) { 0x001FFFFF, 0x00, \_SB.PCI0.LPC0.LNKA, 0x00000000 }, Package (0x04) { 0x001FFFFF, 0x02, \_SB.PCI0.LPC0.LNKC, 0x00000000 } }) } } } }